TSMC Accelerates 3nm and 2nm Capacity Expansion Amid Surge in AI Chip Orders
Driven by strong demand from major clients like Nvidia, AMD, and Broadcom, TSMC is accelerating its production timelines, aiming to reach a monthly output of 180,000 3nm wafers by early Q4 2026 and 100,000 2nm wafers by the end of 2026. Additionally, construction of its 1.4nm (A14) fabs is ahead of schedule, with trial production potentially starting as early as Q3 2027. This acceleration highlights the intense global demand for advanced semiconductor nodes required to power next-generation AI and high-performance computing hardware. TSMC's ability to scale up these cutting-edge nodes ahead of schedule reinforces its dominance in the foundry market and secures the supply chain for major tech companies. To meet the demand, TSMC is adding three new 3nm fabs and converting some 5nm equipment to 3nm. The upcoming 1.4nm process (A14) will utilize second-generation Gate-All-Around (GAA) nanosheet transistors, delivering a 20% to 23% increase in transistor density and up to 30% power reduction compared to the 2nm (N2) node.
## BACKGROUND
Semiconductor manufacturing advances through "nodes" measured in nanometers, where smaller numbers generally indicate denser, faster, and more power-efficient chips. As traditional FinFET transistor architectures hit physical limits below 3nm, the industry is transitioning to Gate-All-Around (GAA) nanosheet architectures to maintain performance scaling.