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SK Hynix Unveils H-TPU SSD Processor Architecture with 2.5% Power Consumption

SK Hynix has introduced the H-TPU (Hynix Transaction Processing Unit) architecture, a specialized lightweight processor designed for SSD controllers. By breaking down control functions and distributing them across dozens of small TPU clusters, it drastically reduces power consumption to just 2.5% of traditional general-purpose CPUs. As AI data centers face severe performance bottlenecks in memory and storage layers, traditional general-purpose CPUs have reached their limits in handling storage control. This innovation addresses major power and performance hurdles, paving the way for next-generation enterprise SSDs and advanced AI storage architectures. The H-TPU uses a simplified four-stage pipeline without superscalar and out-of-order execution devices, occupying only 1/25th of a traditional CPU core's area. SK Hynix plans to integrate H-TPU technology into upcoming enterprise SSDs and coordinate it with the new High Bandwidth Flash (HBF) standard.

## BACKGROUND

SSD controllers manage the reading, writing, and organization of data on solid-state drives, a task historically handled by general-purpose CPUs. High Bandwidth Flash (HBF) is an emerging storage tier positioned between HBM and SSD, bridging the gap between high capacity and high speed for modern computing environments.

## REFERENCES

## KEYWORDS

#Hardware#SSD#Storage Architecture#SK Hynix#AI Infrastructure

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SK Hynix Unveils H-TPU SSD Processor Architecture with 2.5% Power Consumption | Daily News