SK Hynix Adopts Intel's EMIB for Next-Generation HBM4 Packaging
At the Hot Chips 2026 conference, SK Hynix revealed plans to integrate Intel's EMIB (Embedded Multi-Die Interconnect Bridge) packaging technology into its next-generation HBM4 memory solutions. The company is transitioning toward 3D packaging to overcome physical limitations and boost memory performance. This collaboration signals a shift in the semiconductor ecosystem, offering an alternative to TSMC's dominant CoWoS packaging for AI hardware. By adopting EMIB, SK Hynix can deliver higher bandwidth and better thermal management for next-generation AI accelerators. HBM4 will offer bandwidths exceeding 2TB/s, a 40% improvement in power efficiency, and up to 48GB capacity using 12-Hi and 16-Hi stacks. To address thermal and structural challenges, SK Hynix is also developing hybrid bonding and its own "I-HBM" hotspot cooling technology.
## BACKGROUND
High Bandwidth Memory (HBM) stacks DRAM dies vertically to achieve high data transfer rates, relying on Through-Silicon Vias (TSVs) for vertical connections. Traditionally, these stacks are linked to processors via a silicon interposer in a 2.5D package. Intel's EMIB replaces large, expensive silicon interposers with small silicon bridges embedded directly in the substrate, reducing manufacturing costs and complexity.