Nvidia Introduces NVHBM Custom Memory for NVLink Fusion Partners
Nvidia has introduced NVHBM, a custom high-bandwidth memory solution designed for its NVLink Fusion ecosystem partners. Developed in collaboration with leading memory manufacturers, NVHBM integrates the memory controller directly into the HBM base die, offering 30% higher bandwidth and 15% lower power consumption compared to standard HBM4e. This development allows custom AI chip designers, such as Amazon's Annapurna Labs, to build more efficient processors that natively connect to Nvidia's high-speed NVLink interconnect. By reducing power consumption and memory footprint, it enables hyperscalers to maximize compute density and efficiency in massive AI data centers. Moving the memory controller to the HBM base die and utilizing a smaller custom physical layer (PHY) frees up to 30% more space on the main silicon die for compute resources. Additionally, NVHBM simplifies routing on the interposer for advanced multi-chip packaging designs.
## BACKGROUND
High Bandwidth Memory (HBM) is a 3D-stacked DRAM technology critical for AI accelerators due to its high data transfer rates. Nvidia's NVLink Fusion is an integration platform that allows third-party custom ASICs (like AWS Trainium) to connect directly to Nvidia's NVLink networking stack, enabling unified computing systems. Traditionally, memory controllers reside on the main processor die, which consumes valuable silicon area.