Micron Highlights NVHBM Technology to Boost Profitability and AI Memory Bandwidth
Micron and NVIDIA outlined details regarding NVHBM, a customized High Bandwidth Memory architecture that moves the memory controller onto the memory base die. Compared to standard HBM4E, NVHBM delivers up to 30% higher memory bandwidth and 15% lower HBM power consumption. Offloading memory control from the main processor frees up valuable compute die area, enabling higher processing density and energy efficiency in AI accelerators. This marks a strategic shift toward custom logic integration within memory stacks to solve memory bandwidth bottlenecks in large-scale AI workloads. NVHBM incorporates a customized input/output physical layer (PHY) directly into the base die, reducing the required package area for the I/O PHY by up to 67%. Micron expects the architecture to enhance profitability even when outsourcing the production of the logic base die to external foundries.
## BACKGROUND
High Bandwidth Memory (HBM) stacks DRAM chips vertically on a base die to provide ultra-fast data access for GPUs and AI chips. Traditionally, memory controllers resided on the main compute GPU die, consuming valuable silicon space and incurring power overhead. Next-generation standards like HBM4 and custom variants like NVHBM are evolving to use advanced process nodes directly in the HBM base die.