MediaTek Plans Second-Gen AI ASIC for 2028 Using Intel EMIB Packaging
MediaTek announced that its first AI ASIC accelerator will enter mass production in Q2 2026, while its second-generation chip is scheduled for production in 2028. The company is collaborating with Intel Foundry to utilize its EMIB-T advanced packaging technology alongside TSMC's CoWoS. This move highlights a significant shift in the semiconductor supply chain, as MediaTek diversifies its advanced packaging partners by adopting Intel's EMIB alongside TSMC's industry-standard CoWoS. It also signals MediaTek's aggressive expansion into the high-performance AI hardware market. MediaTek is also developing 448G SerDes high-speed I/O IP and co-packaged optics (CPO) solutions on TSMC's COUPE platform. Additionally, the board approved a $5 billion discretionary fund to secure supply chain capacity and support its transition from chips to full-scale AI systems.
## BACKGROUND
Advanced packaging technologies like TSMC's CoWoS and Intel's EMIB (Embedded Multi-die Interconnect Bridge) are crucial for connecting multiple chips (like logic and High Bandwidth Memory) with high density and speed. SerDes (Serializer/Deserializer) and silicon photonics platforms like TSMC's COUPE are essential for handling the massive data transfer rates required by modern AI data centers.