Kepler Computing Emerges from Stealth with 3D-Stacked FeRAM Architecture for AI
AI chip startup Kepler Computing has officially emerged from stealth, unveiling a 3D-stacked Ferroelectric RAM (FeRAM) architecture designed to tackle memory bandwidth, energy efficiency, and supply bottlenecks in AI hardware. The company targets sampling its initial chips by late 2026, with scaled production planned for 2027. Modern AI workloads face a severe memory bottleneck where high-speed SRAM lacks capacity and High Bandwidth Memory (HBM) relies heavily on expensive EUV lithography and complex packaging. Kepler's approach could deliver near-SRAM bandwidth and high capacity on mature manufacturing nodes, potentially lowering production costs and expanding global AI chip manufacturing capacity. Kepler claims its architecture offers higher memory capacity than SRAM or HBM without requiring EUV lithography machinery. The startup is currently running trial production on GlobalFoundries' 28nm node in Singapore, having successfully adapted existing fab equipment in just eight months.
## BACKGROUND
FeRAM (Ferroelectric Random-Access Memory) is a non-volatile memory technology that uses ferroelectric material properties to store data, combining high read/write speeds with low power consumption and high endurance. In AI hardware, transferring data between memory and processing units—known as the memory wall—consumes substantial energy, making low-voltage non-volatile architectures an attractive alternative to traditional DRAM and SRAM.