InnoLux Unveils Chip-Last FOPLP Advanced Packaging Platform for H2 2027 Mass Production
Display manufacturer InnoLux officially announced its Chip-Last Fan-Out Panel-Level Packaging (FOPLP) platform aimed at high-density AI and HPC chip integration. The company plans to enter mass production in the second half of 2027 by converting existing TFT display manufacturing lines. This initiative highlights the industry trend of display panel makers entering advanced semiconductor packaging to address bottleneck capacity in AI hardware. By scaling up to panel-level production, InnoLux aims to offer significantly higher manufacturing efficiency and lower costs for heterogeneous integration. The platform utilizes a 620mm × 670mm panel size—the largest in the industry—and supports multi-layer redistribution layers (RDL) with line width and spacing as fine as 2μm. Additionally, InnoLux developed a panel-level testing solution that tests up to 64 chips simultaneously, increasing testing efficiency by 50% to 80%.
## BACKGROUND
Fan-Out Panel-Level Packaging (FOPLP) is an advanced semiconductor packaging technique that processes chips on large rectangular panel substrates rather than traditional round wafers, increasing area utilization. In a Chip-Last approach, the multi-layer redistribution layers (RDLs)—which provide metallic interconnections—are fabricated first before attaching the silicon dies, avoiding the waste of expensive substrate wiring on defective chips.