Faraday Secures Major Cloud AI Chip Design Win Using Samsung 2nm
Faraday Technology announced a record-breaking cloud AI chip design win utilizing Samsung's 2nm process, featuring 3D stacked DRAM with hybrid bonding technology and PCIe Gen6 support. This milestone highlights the growing adoption of cutting-edge gate-all-around (GAA) manufacturing processes and advanced 3D packaging for high-performance cloud computing and AI workloads. The custom chip supports FP64 computing for HPC tasks and represents a major upgrade from the client's initial 4nm plan due to superior performance and power efficiency considerations.
## BACKGROUND
Samsung's 2nm process employs next-generation Gate-All-Around (GAA) transistor architecture to overcome physical scaling limitations. Hybrid bonding is an advanced chip-to-chip or wafer-to-wafer interconnect technology using direct metal-to-metal and dielectric-to-dielectric bonds, bypassing traditional solder bumps to dramatically increase bandwidth and density.