Axera Launches 5nm M97 and M95 Autonomous Driving Chips with up to 720 TOPS
Axera has officially launched its M9 series 5nm automotive AI chips, featuring the flagship M97 and mainstream M95 for autonomous driving and integrated cockpit-driving platforms. The flagship M97 houses 16 Arm Cortex-A78AE CPU cores and delivers up to 720 TOPS of equivalent AI compute performance. As autonomous driving transitions toward one-stage end-to-end architectures and Vision-Language-Action (VLA) models, high-performance silicon with low ISP latency becomes essential. Axera's new 5nm chips strengthen domestic chip offerings in China for high-level autonomous driving and integrated cockpit systems. The M97 delivers 460 GB/s equivalent memory bandwidth and supports 16-channel camera inputs, while the M95 offers 360 TOPS with 14-channel camera inputs. Both chips satisfy AEC-Q100 auto-grade certification, feature an on-chip ASIL-D lockstep safety island with an overall ASIL-B rating, and achieve a 70% reduction in ISP pathway latency.
## BACKGROUND
The ISO 26262 standard establishes Automotive Safety Integrity Levels (ASIL) from A to D, where ASIL-D represents the most stringent functional safety requirements to ensure vehicle systems remain safe during faults. In autonomous driving, one-stage end-to-end models process raw sensor inputs directly into vehicle control outputs without intermediate manual handoffs.