Apple Debuts A20 Pro Chip with 32-Core Neural Engine and 96-Bit Memory Bus
Apple has unveiled the A20 Pro system-on-chip featuring a 7-core GPU, a doubled 32-core Neural Engine, and a wider 96-bit LPDDR5X memory bus. Built on a 2nm process node, the new chip delivers roughly 115 GB/s of memory bandwidth, representing a 50% increase over previous 64-bit architectures. Memory bandwidth is the primary performance bottleneck for executing local large language models (LLMs) on mobile hardware. By expanding memory bandwidth by 50% alongside a doubled Neural Engine, Apple significantly boosts edge AI processing capabilities for complex on-device models. Expanding the memory bus from 64-bit to 96-bit on advanced 2nm silicon represents a costly die-area commitment to memory infrastructure. Additionally, increasing dedicated Neural Engine cores from 16 to 32 provides significantly higher matrix-math throughput for workloads running via Core ML.
## BACKGROUND
The Apple Neural Engine (ANE) is a specialized hardware accelerator embedded in Apple Silicon to handle machine learning models efficiently on-device. For generative AI workloads, overall performance relies heavily on unified memory bandwidth, which dictates how fast model parameters can be loaded into processor cores.