Aisin and Tohoku University Develop World's First 16nm STT-MRAM AI SoC
Aisin and Tohoku University have jointly developed the world's first 16nm AI SoC integrating STT-MRAM using a near-memory computing architecture. The chip integrates 32MB of embedded MRAM to store AI model weights and boot data locally, drastically improving energy efficiency and processing speeds. This breakthrough achieves a 50x increase in target detection energy efficiency and speeds up overall system operation by 25.2 times compared to traditional solutions. It represents a major step forward for Edge AI hardware, enabling rapid boot times and low-power processing without relying on external DRAM or SSD storage. The SoC utilizes an 8/16-bit mixed multiplication architecture and weight sharing technology to run Tiny YOLOv3 for object detection within a limited on-chip STT-MRAM capacity. It reduces system boot time to 65.7ms and requires only 50.7mJ per frame for object detection.
## BACKGROUND
STT-MRAM (Spin-Transfer Torque Magnetic Random-Access Memory) is a non-volatile memory technology that uses electrons with spin-polarized current to change magnetic orientation, offering near-zero leakage power consumption. Near-memory computing is an advanced hardware architecture that places processing units close to memory to minimize data movement and reduce latency.